Forum on Innovation and Development of Semiconductor Measurement and Test Equipment

Currently serving as Deputy Chief Engineer and Senior Researcher at the 58th Research Institute of China Electronics Technology Group Corporation (CETC), he specializes in integrated circuit and electronic component research. Having led or participated in over 10 national and provincial-level scientific research projects, he has published more than 10 academic papers and contributed to multiple national standards. His leadership roles include Director of the Management Committee at Jiangsu Integrated Circuit Testing and Reliability Engineering Center, Chief Technical Expert at China National Integrated Circuit Standard Verification Center, Deputy Secretary-General of China Testing and Inspection Alliance, member of National Military Standards Technical Committee, and committee member of China Electronics Society's Reliability Branch

Mr. Jiangang Han is employed at cybertechnologies GmbH, Germany, with over ten years of professional experience in optical topography measurement. He specializes in delivering high-precision measurement solutions to leading clients in the global semiconductor industry. His core expertise lies in designing and implementing customized optical topography measurement schemes for complex and demanding measurement requirements. Leveraging his deep understanding of semiconductor manufacturing processes and advanced measurement technologies, he successfully applies cutting-edge techniques to real-world production challenges, ensuring the precise execution of complex measurement tasks and the effective implementation of solutions.

With over 20 years of experience in the semiconductor inspection

equipment industry, Seddy Chu spent 15 years at leading fabs and internationally renowned inspection equipment companies, where he was responsible for market development and application support for metrology and particle defect inspection tools in China.

He joined ZAS in 2021, where he has led initiatives in both market expansion and technology development. Under his leadership, ZAS metrology system—benchmarked against KLA’s tools—was rapidly developed, validated, and commercialized, with nearly 20 units now installed across domestic fabs.

He also played a key role in market research and strategic direction for Zas’s non-patterned particle inspection systems. Following the release of a system with 19nm sensitivity designed to meet 14nm high-volume manufacturing (HVM) requirements, he quickly drove market penetration in China, securing demo orders from several major customers.

Defect inspection technology expert, currently serving as Deputy Head of the Semiconductor Division at Suzhou TZTEK Technology Co., Ltd. Previously headed the Yield Enhancement and Metrology & Inspection Department at a domestic chip manufacturing company.

Graduated from Beijing Institute of Technology, Senior Engineer, and expert at the Beijing Municipal Science & Technology Commission. With over a decade of industry experience, he has been engaged in the R&D of semiconductor metrology and inspection equipment.

As a key technical contributor, he has participated in multiple national-level research projects, including:

Three projects under the National Science and Technology Major Project "Extremely Large-Scale Integrated Circuit Manufacturing Equipment and Complete Process" (02 Special Project)

Two projects under the National Key R&D Program "Development of Major Scientific Instruments and Equipment"

With strong engineering expertise in semiconductor optical metrology and inspection, he has contributed to the development and industrialization of several domestically produced semiconductor optical measurement and inspection systems.

Richard NIE currently serves as the General Manager of the Business Division of Yuwei Semiconductor Technology Co.,Ltd. With over a decade of expertise in semiconductor optical inspection equipment, he has been instrumental in advancing cutting-edge solutions in this field.YUWEITEK has developed the Raptor series, providing the industry with photomask pattern defect inspection solutions tailored for mature process nodes. This equipment addresses a long-standing market gap and has been successfully deployed in photomask and wafer production scenarios.At this forum, Mr. Nie will delve into the key challenges and demands in domestic photomask inspection, engaging with attendees to explore future industry trends and product development directions.

Mr. Ge Liang is the Director of Business Development and Test Technology Architecture Department of Advantest China, responsible for the development, implementation and market expansion of new technologies/businesses in the field of SOC test. He has more than 15 years of experience in the semiconductor test industry, and has been engaged in R&D, application and marketing work related to chip ATE tests for a long time.

Mr. Sicheng Zhao is currently serving as the Product Director of the R&D Center of Herch Opto Electronic Technology Co., Ltd.

He was selected as a Young Innovative Talent by the 2024 Xi'an Talent Program .

He holds a Bachelor's degree in Chemical and Biomolecular Engineering from the Georgia Institute of Technology in the United States and a Master's degree in Advanced Mechanical Engineering from Sheffield Hallam University in the UK.

Previously, he worked as a Sales Engineer at Focuslight Technology, technical support for the German market, and served as a Product Development and Engineering Expert in the Semiconductor Laser Division.

With extensive experience in the laser and ‌Photonics field, he specializes in the design of beam shaping combining lasers and micro-optics, as well as the innovative research and development and process development of new products and manufacturing equipment.